Hardware UHS far jump:

c-64 stock Code on UHS is divided into 8k chunks paged in at 8000-bfff

At bfff, in every bank, there's an rts

far jumping is as such

jsr bfff xx yy zz

xxyyzz is the 24bit address of the far jump

JSR is used as a requirement of the trickery done to implement this long
jump

the rts at bfff is actually what does the jump, but the hardware sets
everything up between the jsr and the rts

The JSR is as such

JSR

#  address R/W description
-- ------- --- -------------------------------------------------
1    PC     R  fetch opcode, increment PC
2    PC     R  fetch low address byte, increment PC
3  $0100,S  R  internal operation (predecrement S?)
4  $0100,S  W  push PCH on stack, decrement S
5  $0100,S  W  push PCL on stack, decrement S
6    PC     R  copy low address byte to PCL, fetch high address
               byte to PCH

So,
algo is as such

watch for a read of $20 from the c64
(always active unless the state machine is activated)

the numbers indicate cycles
1:  (read of $20) enable state machine
2:  Compare d[0:7] with $ff.  Abort if not a match
3:  nop
4:  nop
5:  latch a[0:7] into my_sp
6:  latch a[0:15] into my_addr and compare d[0:7] with $bf  Abort if not a
    match
7:  latch dma mode in
8:  nop
9:  nop
10: nop
11:
   increment my_addr on clock edge
   latch (my_addr) into bank_low
12:
   increment my_addr on clock edge
   latch (my_addr) into bank_high
13:
   increment my_addr on clock edge
   latch (my_addr) into low_addr
14:
   store {0000{[0:3] of bank_high}} in (my_sp)
15:
   decrement my_sp
   store low_addr in (my_sp)
16:
   release DMA
   abort
  

Hmmz.. fits neatly into a 4bit address space for microcoding
how convenient ;)